1. Field of the Invention
The present invention relates to converters having tapped inductors.
2. Background Art
For the basic buck, boost and buck-boost converters in the continuous conduction mode the conversion ratio Vout/Vin is always related to the duty cycle δ of the transistor switch, which is controlled by pulse width modulation (PWM). In practice, minimum and maximum conversion ratios are limited.
The classical boost converter for instance, is very efficient when not too large a potential difference separates the output voltage from the input voltage (i.e. when the duty cycle δ is low, and typically below 50%). However, in industrial applications, it is not unusual that a 14V input voltage needs stepping up to 220V (and even higher) for the supply of household facilities. When such a conversion ratio is required, the duty cycle δ must be very high to achieve such a transfer ratio and the efficiency of the classical boost converter becomes unacceptably low. This leads to poor utilization of passive components and poor current waveform form factors. In the classical boost and buck-boost converters, efficiency worsens significantly for a duty cycle δ over 50%.
The classical buck converter for instance, is very efficient when not too large a potential difference separates the output voltage from the input voltage (i.e. when the duty cycle δ is high, and typically over 50%). However, in industrial applications, it is not unusual that a 48V input voltage needs stepping down to 3.3V (and even below) for the supply of semiconductors or microprocessors. When such a conversion ratio is required, the duty cycle δ must be very low to achieve such a transfer ratio and the efficiency of the classical buck converter becomes unacceptably low. This leads to poor utilization of passive components and poor current waveform form factors.
The efficiency of the dc-dc converter when a large conversion ratio is required needs therefore to be improved. The conversion ratio can be extended significantly by cascading two dc-dc converter. However, such applications require twice as many components as a basic converters, which is very costly and difficult to manage.
A high voltage ratio may be obtained using quadratic converters. These converters have the same conversion ratio as two cascaded boost dc-dc converters, with only one transistor switch. They are called quadratic converters because they square the standard dc-dc converter voltage ratios. This leads to easier control and management of the converter. Moreover, compared to a classical converter, quadratic converters yield a much lower limit on the minimum attainable conversion ratio.
In terms of efficiency and cost, a single-stage converter is a better choice than a two-stage converter since single-stage converters employ fewer components than two-stage converters. Hence the applications of the quadratic converters are only tolerable where conventional, single stage converters are inadequate—in particular for high frequency applications where the specified range of input voltages and the specified range of output voltages call for an extremely large range of conversion ratios. Another drawback is that even though these converters utilize a single transistor switch, the number of components is still higher than in basic converters.
Synchronous rectification may be used to improve the efficiency of a converter. Significant efficiency improvement can be made in the case of a dc-dc converter. The technique employed is to substitute the diode with an N-channel MOSFET. Both transistor switches are controlled by two signals v1 and v2 one of which is the inverse of the other. The goal of this change is to reduce the forward-biased voltage of the classical diode i.e. 0.6V. For a Schottky diode, the diode drop will be lower than 0.6V (typically 0.3V). However, by employing the synchronous rectifier technique, the drop will depend on semiconductor technology and can be reduce to 0.1V or even below.
The improvement is achieved for duty cycles below 50% for boost topologies and above 50% for buck topologies but not over that value. High duty for boost topologies and low duty cycles for buck topologies causes losses in the inductor as well as larger inductor ripple currents, which increase conduction losses and switching losses in the MOSFETs. Another problem for the synchronous rectifier boost converter working at high duty cycle (>50%) and a synchronous rectifier buck converter working at low duty cycle (<50%), is the asymmetric transient response that occurs due to the great difference between the rate of rise and the rate of fall of the inductor current.